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(R)
STB70NFS03L
N - CHANNEL 30V - 0.008 - 70A D2PAK STripFETTM MOSFET PLUS SCHOTTKY RECTIFIER
PRELIMINARY DATA MAIN PRODUCT CHARACTERISTICS MOSFET V DSS 30V SCHOTTKY IF (A V) 3A R DS(on ) <0.01 V RRM 30V ID 70A V F(M AX) 0.51V
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D2PAK TO-263 (suffix "T4")
DESCRIPTION:
This product associates a Power MOSFET of the third generation of ST Microelectronics unique "Single Feature Size" strip-based process and a low drop Schottky diode. The transistor shows the best trade-off between on-resistance and gate charge. Used as low side in buck regulators, the product is the best solution in terms of conduction losses and space saving.
INTERNAL SCHEMATIC DIAGRAM
MOSFET ABSOLUTE MAXIMUM RATINGS
Symbol VDS V DGR V GS ID ID IDM(*) P t ot T stg Tj Parameter Drain-source Voltage (VGS = 0) Drain- gate Voltage (RGS = 20 k) Gate-source Voltage Drain Current (continuous) at Tc = 25 o C Drain Current (continuous) at Tc = 100 oC Drain Current (pulsed) Total Dissipation at Tc = 25 C Derating Factor Storage Temperature Max. Operating Junct ion Temperature
o
Valu e 30 30 22 70 50 280 100 0.67 -65 to 175 175
Unit V V V A A A W W/ oC
o o
C C
(*) Pulse width limited by safe operating area
SCHOTTKY ABSOLUTE MAXIMUM RATINGS
Symb ol V RRM I F(RMS) I F (AV) I FSM dv/dt April 2000 Parameter Repetitive Peak Reverse Voltage RMS F orward Current Average F orward Current Surge Non Repetitive F orward Current Critical Rate Of Rise O f Reverse Voltage T L =125 o C =0.5 tp= 10 ms Sinusoidal Valu e 30 20 3 75 10000 Un it V A A A V/s 1/6
STB70NFS03L
THERMAL DATA
R thj -case R thj -amb Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Maximum Lead Temperature F or Soldering Purpose 1.5 62.5 175
o o
C/W C/W o C
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF
Symbo l V (BR)DSS I DSS IGSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 A V GS = 0 Min. 30 1 10 100 Typ. Max. Unit V A A nA
Zero Gate Voltage V DS = Max Rating Drain Current (V GS = 0) V DS = Max Rating Gate-body Leakage V GS = 20 V Current (VDS = 0)
T c =125 oC
ON ()
Symbo l V GS(th) R DS(on) I D(o n) Parameter Gate Threshold Voltage V DS = V GS Static Drain-source On V GS = 10 V Resistance V GS = 5 V On State Drain Current Test Con ditions ID = 250 A ID = 35 A I D = 18 A 70 Min. 1 0.008 0.015 0.01 0.018 Typ. Max. Unit V A
V DS > ID(o n) x R DS(on )ma x V GS = 10 V
DYNAMIC
Symbo l g f s () C iss C os s C rss Parameter Forward Transconductance Test Con ditions V DS > ID(o n) x R DS(on )ma x f = 1 MHz I D =35 A V GS = 0 Min. Typ. 40 1470 490 110 Max. Unit S pF pF pF
Input Capacitance V DS = 25 V Output Capacitance Reverse T ransfer Capacitance
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STB70NFS03L
ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON
Symbo l t d(on) tr Qg Q gs Q gd Parameter Turn-on Delay T ime Rise Time Total G ate Charge Gate-Source Charge Gate-Drain Charge Test Con ditions V DD = 15 V ID = 35 A R G = 4.7 V GS = 10 V (Resistive Load, see fig. 3) V DD = 24 V I D = 46 A V GS = 10 V Min. Typ. 20 350 35 5 10 45 Max. Unit ns ns nC nC nC
SWITCHING OFF
Symbo l t d(of f) tf Parameter Off-voltage Rise T ime Fall T ime Test Con ditions V DD = 24 V I D = 35 A V GS = 10 V R G = 4.7 (Resistive Load, see fig. 3) Min. Typ. 35 65 Max. Unit ns ns
SOURCE DRAIN DIODE
Symbo l ISD I SDM (*) V SD () t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Time Reverse Charge Reverse Current I SD = 70 A V GS = 0 70 105 2.4 Recovery I SD = 70 A di/dt = 100 A/s T j = 150 o C V DD = 15V Recovery (see test circuit, figure 5) Recovery Test Con ditions Min. Typ. Max. 70 280 1.5 Unit A A V ns nC
() Pulsed: Pulse duration = 300 s, duty cycle 1.5 % (*) Pulse width limited by safe operating area
SCHOTTCKY STATIC ELETTRICAL CHARACTERISTICS
Symbo l I R () V F() Parameter Reversed Current
o
Test Con ditions V R =30V V R=30V I F =3A I F =3A
Min.
Typ. 0.03 0.38
Max. 0.2 100 0.51 0.46
Unit mA mA V V
Leakage T J= 25 C T J= 125 oC T J= 25 oC T J= 125 oC
Forward Voltage drop
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STB70NFS03L
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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STB70NFS03L
TO-263 (D2PAK) MECHANICAL DATA
mm MIN. A A1 B B2 C C2 D E G L L2 L3 4.4 2.49 0.7 1.14 0.45 1.21 8.95 10 4.88 15 1.27 1.4 TYP. MAX. 4.6 2.69 0.93 1.7 0.6 1.36 9.35 10.4 5.28 15.85 1.4 1.75 MIN. 0.173 0.098 0.027 0.044 0.017 0.047 0.352 0.393 0.192 0.590 0.050 0.055 inch TYP. MAX. 0.181 0.106 0.036 0.067 0.023 0.053 0.368 0.409 0.208 0.624 0.055 0.068
DIM.
D A C A2 DETAIL "A" A1 B2 B G
C2
DETAIL"A"
E
L2
L
L3
P011P6/E
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STB70NFS03L
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 2000 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com
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